November 30, 2022

Synopsys Inc is hiring freshers as Intern (Technical-Engineering) – 36312BR Candidates from the multiple batches are eligible for this role. The detailed eligibility and application process are given below.

Job Responsibilities

Responsible for developing backend ASIC design flow from netlist to gdsii & Physical verification for

validating the std cell libraries . Also need to work on automation using perl and tcl for enhancing the design flow .

Requires
  • Bachelors or Masters degree in electronics or electrical engineering (B. Tech/M. Tech) or equivalent from reputed universities .
  • Knowledge on VLSI technology
  • Gate level and circuit level understanding of CMOS logic design.
  • Experience in physical design implementation flow (floorplan, placement, CTS and routing)
  • Scripting in Perl and TCL
  • Understanding of timing and design closure aspects
  • DRC/LVS understanding
  • Good communication, interpersonal skills and team player

Company NameSynopsys Inc
Company websitewww.Synopsys Inc.com
Job RoleIntern (Technical-Engineering) – 36312BR
BatchAny Graduate
Locationindia
SalaryBest in Industry



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Apply Link : Click Here

Location: india

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